Last updated on March 9, 2021
After Fadu has already developed the first RISC-V chips for SSDs, Fadu is moving forward with Seagate and Western Digital two of the largest manufacturers.
Seagate and Western Digital have announced to work on SSD controllers with RISC-V instead of ARM cores. Seagate has developed a fast and a space-optimized core for this purpose, and Western Digital now offers three designs.
The first manufacturer of RISC-V-based SSD controllers to date was Fadu from South Korea: Its FC3081 is a PCIe Gen3-x4 model that achieves up to 3.5 GByte/s as read rate and up to 3.0 GByte/s as write rate. Only a few weeks ago the FC4121 was introduced, a PCIe-Gen4-x4 controller for NVMe SSDs. The chip achieves up to 7.1 GByte/s read and up to 5.1 GByte/s write.
Seagate began development of a high-performance RISC V core in 2015. One of the purposes of this core is to detect narrow-band oscillations in hard disks at up to three times the speed and then adjust the heads accordingly. Since 2019, an area-optimized core has been designed, which is currently only available as an FGPA implementation. It is intended for security functions, such as Google’s Open Titan project. Seagate will announce more detailed information about the two cores on December 10, 2020.
The high performance core … (Picture: Seagate)
Western Digital has built the SweRV EH1 named core, a RV32IMC with a thread in the 28nm process. This thread is in a first SSD controller of the US-Americans, but Western Digital did not comment further on its capabilities. However, based on previous prototypes, the SSD controller is to be used for market-ready products in the near future.
In addition to the SweRV EH1, there is also the SweRV EH2 with two threads (SMT2), it is designed for 16 nm and with 6.3 coremarks per MHz it performs significantly better than the EH1 with 4.9 coremarks per MHz. With 0.067 mm² instead of 0.11 mm² in one core, it is more compact.
So far there are three cores: EH1, EH2 and EL2. (Picture: Western Digital)
In addition, there is the SweRV EL2, an RV32IMC with 4-stage instead of 9-stage pipeline: The 16 nm core measures only 0.023 mm² and achieves 3.6 coremarks per MHz.
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